Resin-insulated SiC module boosts power density

Resin-insulated power module
(Image courtesy of Toshiba)

Toshiba is using resin and AI design techniques to boost the efficiency of power modules for EVs, writes Nick Flaherty.

The resin improves the insulation of the substrate in a module with smaller silicon carbide (SiC) power transistors, allowing a smaller inverter with dramatically less cooling.

Semiconductor modules use an insulating substrate to prevent electrical interference with surrounding devices, and resin insulating substrates offer lower cost and longer service life with durability against thermal fatigue. However, they also have lower thermal conductivity and higher thermal resistance compared with the ceramic substrates that are in widespread use.

A large cooling system is needed to maintain high performance, but this creates the separate problem of increasing the overall size of the module.

So, Toshiba used an AI technique to assess the design of the module to increase the thermal dissipation area and reduce the thermal resistance by decreasing the area of chips mounted on a module.

As the number of chips in the module increases, the number of parameters required for designing the chip layout also increases and the overall optimal design, including the electrical and thermal characteristics, becomes more difficult. However, an optimal design was possible by means of a unique optimisation algorithm using AI.

Although Toshiba makes ceramic-insulated SiC power modules, it is also working on resin-insulated SiC power modules for next-generation devices because these have lower cost and longer service life.

Toshiba decreased the area of the SiC power semiconductor chips installed in the module, increased the number of mounted chips, and arranged the chips distributed across the entire module. Because the heat dissipation area of the chips is large with radiance shaped toward the heatsink at the bottom of the module, the heat dissipation area increases as the number of chips increases, leading to improved thermal resistance.

The AI-based high-dimensional Bayesian optimisation technology automatically optimises large numbers of parameters that would be difficult to explore manually while designing devices such as high-performance power semiconductors and advanced materials.

This boosts the performance by seeking out the optimal combination of values through the adjustment of more parameters. For example, when using grid search, a typical optimisation method employed in manual design, if the target performance is evaluated using 10 different values for each parameter, the number of combinations requiring evaluation to determine the optimal parameter values increases from 100 for two parameters (10²) to 10 billion (10¹⁰) for 10 parameters. Manually optimising a large number of parameters is thus difficult and time-consuming.

However, the AI enables the optimisation of high-dimensional parameter vectors comprising numerous parameters to data- driven design.

Toshiba applied this AI to the automatic design of the power semiconductor, reducing the on-resistance by a third compared with conventional search methods based on standard Bayesian optimisation.

This resulted in a lower parasitic resistance of 1.23 mΩ, leading to a switching loss of 52.2 mW.

A prototype resin-insulated module had 21% lower thermal resistance at 0.040 K/W compared with conventional ceramic-insulated SiC power modules at 0.051 K/W. Used in an inverter, a trial calculation found that the cooling system size could be reduced by 61% from 5371 to 2227 cm3.

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